ARM Architecture

  • Instruction set - The function of each instruction, how that instruction is represented in memory (its encoding)
  • Register set - How many registers there are, the size of the registers, the function of the registers and their initial state
  • Exception set - The different types of privilege, the types of exceptions, what happens on taking or returning from an exception
  • Memory model - How the memory accesses are ordered, how the caches behave and when and how software must perform explicit maintenance
  • Debug, trace and profiling - How breakpoints are set and triggered, what information can be captured by trace tools and in what format

Architecture vs Micro-Architecture

  • Architecture does not tell you how a processor is built or how it works. The build and design of a processor is referred to as micro-architecture. Micro-architecture tells you how a particular processor works.
  • Architecture behaves a contract between hardware and software developer. It tells us about the instruction set supported by the hardware
  • Micro-architecture includes things like:
    • Pipeline length and layout
    • Number and sizes of caches
    • Cycle counts for individual instructions
    • Which optional features are implemented

Example

  • For example cortex A53 and A72 are both implementations of the Armv8-A architecture. This means they have the same architecture.
  • But they both have different micro-architectures

Understanding ARM Documentation

  • Each ARM architecture reference manual describes an architecture specification. An ARM Architecture reference manual is relevant to any implementation of that architecture
  • Each ARM cortex processor has a technical reference manual (TRM). The TRM describes the features specific to that processor. In general, the TRM’s do not repat any information given in the ARM Architecture reference manuals.
  • Each arm cortex processor also has a configuration and integration manual (CIM). The CIM describes how to integrate the processor into a system. Generally this information is only relevant to SoC designers.